Hardware Ports

ARM

ARM Cortex-A8 Core

Status: Current
String: cortexa8
ISAs: ARMv7-A, Thumb, Thumb-2, NEON SIMD
Word size: 32 bits
Address size: 32 bits
Byte order: little-endian
PCS: Procedure Call Standard for the ARM Architecture
Floating-point ABI: hardware
GCC CPU name: cortex-a8
CFLAGS: -O3 -fsingle-precision-constant
GCC configure options: --with-arch=armv7-a --with-cpu=cortex-a8
 --with-tune=cortex-a8 --with-mode=thumb --with-fpu=neon --with-float=hard
 --with-abi=aapcs-linux

Intel

Intel 80486 Microprocessor

Status: Potential
String: i486
Word size: 32 bits
Address size: 32 bits
Byte order: little-endian
GCC CPU name: i486

See also:

Intel P5 Microarchitecture

Status: Potential
String: p5 or i586
Word size: 32 bits
Address size: 32 bits
Byte order: little-endian
GCC CPU name: pentium

P5, Intel's first superscalar microarchitecture, was first implemented in Pentium CPUs.

See also:

Intel P5 Microarchitecture + MMX

Status: Potential
String: p5mmx or i586mmx
Word size: 32 bits
Address size: 32 bits
Byte order: little-endian
GCC CPU name: pentium-mmx

Intel P6 Microarchitecture

Status: Planned
String: p6 or i686
Word size: 32 bits
Address size: 36 bits (PAE)
Byte order: little-endian
GCC CPU name: pentiumpro

Intel P6 was first implemented in Pentium Pro CPUs and was later revived in Pentium M CPUs.

See also:

Intel Core Microarchitecture

Status: Planned
String: core2 or core
Word size: 64 bits
Address size: 64 bits
Byte order: little-endian
GCC CPU name: core2

See also:

Intel Nehalem Microarchitecture

Status: Potential
String: nehalem or corei3 or corei7
Word size: 64 bits
Address size: 64 bits
Byte order: little-endian
GCC CPU name: corei7

This is the microarchitecture used by CPUs in the first-generation Intel Core i7 family.

See also:

Intel Sandy Bridge Microarchitecture

Status: Potential
String: sandybridge or cori3avx or corei7avx
Word size: 64 bits
Address size: 64 bits
Byte order: little-endian
GCC CPU name: corei7-avx

This is the microarchitecture used by CPUs in the second-generation Intel Core i7 family. Sandy Bridge CPUs include an on-die GPU.

See also:

AMD

AMD K8 Microarchitecture

Status: Planned
String: k8
Word size: 64 bits
Address size: 64 bits
Byte order: little-endian
GCC CPU name: k8

This is the first implementation of the AMD64 design, a 64-bit extension to the IA-32 series.

See also:

AMD Family 10h Microarchitecture

Status: Potential
String: amdfam10h or fam10h
Word size: 64 bits
Address size: 64 bits
Byte order: little-endian
GCC CPU name: amdfam10h

See also:

MIPS

64-Bit MIPS (little-endian) Microarchitecture

Status: Potential
String: mips64el
Byte order: little-endian
GCC CPU name: mips64el

32-Bit MIPS (little-endian) Microarchitecture

Status: Potential
String: mipsel
Byte order: little-endian
GCC CPU name: mipsel